1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an apparatus and method for driving an LCD device, in which resolution of images can be improved by increasing the difference in gray level between adjacent pixels of video data.
2. Discussion of the Related Art
Recently, various flat panel displays that can reduce weight and volume of a cathode ray tube have been developed. Examples of the flat panel displays include a liquid crystal display (LCD) device, a field emission display (FED) device, a plasma display panel (PDP) device, and a light emitting display (LED) device. Among them, the LCD device includes a thin film transistor (TFT) array substrate, a color filter array substrate, and a liquid crystal layer between the thin film transistor array substrate and the color filter array substrate. The thin film transistor array substrate has a plurality of pixel electrodes arranged in pixel regions defined by a plurality of data lines and a plurality of gate lines, and a thin film transistor serving as switching elements formed in the respective pixel electrodes.
FIG. 1 is a schematic diagram of an apparatus for driving an LCD device according to the related art. As shown in FIG. 1, the apparatus includes an LCD panel 10 having first to nth gate lines GL1 to GLn and first to mth data lines DL1 to DLm, the gate lines GL1 to GLn crossing the data lines DL1 to DLm to define pixel regions, a data driver 20 supplying analog video signals to the data lines DL1 to DLm, a gate driver 30 supplying scan pulses to the gate lines GL1 to GLn, and a timing controller 40 aligns external input video data RGB, supplies the aligned data to the data driver 20, generates data control signals DCS to control the data driver 20, and generates gate control signals GCS to control the gate driver 30.
Although not shown, the LCD panel 10 includes a thin film transistor array substrate, a color filter array substrate, a spacer, and a liquid crystal. The thin film transistor array substrate and the color filter array substrate face each other and are bonded to each other. The spacer uniformly maintains a cell gap between the two array substrates. The liquid crystal is filled in the cell gap between the two array substrates.
The LCD panel 10 includes TFTs formed in pixel regions where the gate lines GL1 to GLn cross the data lines DL1 to DLm, wherein pixel electrodes are connected to the TFTs. The data signals from the data lines DL1 to DLm are supplied to the TFT by pixel electrodes when the scan pulses from the gate lines GL1 to GLn turn ON the TFTs. Although not shown, the pixel electrode faces a common electrode by interposing the liquid crystal therebetween to form a liquid crystal capacitor Clc and is overlapped with the previous gate lines GL1 to GLn to form a storage capacitor Cst. The liquid crystal capacitor Clc and the storage capacitor Cst maintain the data signals applied to the pixel electrodes until the next data signals are applied thereto.
The timing controller 40 aligns externally input source data RGB to be suitable for driving of the LCD panel 10 and supplies the aligned data to the data driver 20. Also, the timing controller 40 generates the data control signals DCS and the gate control signals GCS using a main clock MCLK, a data enable signal DE, and horizontal and vertical synchronizing signals Hsync and Vsync, which are externally input so as to control each driving timing of the data driver 20 and the gate driver 30.
The gate driver 30 includes a shift register that sequentially generates scan pulses. The shift register generates gate high pulses in response to a gate start pulse (GSP) and a gate shift clock (GSC) among the gate control signals GCS that is generated from the timing controller 40. The gate driver 30 sequentially supplies the gate high pulses to the gate lines GL1 to GLn of the LCD panel 10 to turn ON the TFTs connected to the gate lines GL1 to GLn.
The data driver 20 converts the data signals aligned from the timing controller 40 into the analog video signals in response to the data control signals DCS supplied from the timing controller 40, and supplies the analog video signals to the data lines DL1 to DLm. The data signals correspond to one horizontal line per one horizontal period in which the scan pulses are supplied into the gate lines GL1 to GLn and are supplied to the data lines.
However, the related art apparatus and method for driving an LCD device has several problems. In the related art method for driving an LCD device, the externally input source data RGB are supplied to the respective data lines DL1 to DLm through the data driver 20 without a separate process. Accordingly, the resolution is deteriorated when text messages in stationary images or moving images, which require fineness, are displayed.